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PLC MELSEC-Q Series Dual Core CPU (Part Numbers)
Enables construction of a highly reliable system with an optimal method for all FA/PA scenes by implementing duplication into the entire system, including the CPU, base, network, and power supply.
Part Number
Configured Part Number is shown.
Q12PRHCPU
MELSEC-Q Series Redundant CPU Specifications
Q12PRHCPU
Q12PRHCPU image
Q12PRHCPU Performance Specifications
| Control Method | Stored Program Repeating Operation | ||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Input/Output Control Method | Refresh Method (Direct access input/output is possible by specifying the direct access input/output (DX, DY).) | ||||||||||||||||||||||||||||||||||||||||
| Programming Language | Sequence Control Language | Relay symbol language, Logic symbolic language, MELSAP3 (SFC), MELSAP-L, Function block, Structured text (ST) | |||||||||||||||||||||||||||||||||||||||
| Process Control Language | FBD for process control | ||||||||||||||||||||||||||||||||||||||||
| Processing Speed | Sequence Instruction | LD X0 | 34 ns | ||||||||||||||||||||||||||||||||||||||
| MOV D0 D1 | 102 ns | ||||||||||||||||||||||||||||||||||||||||
| Duplication Function | Tracking Execution Time (Scan Time Extension Time) | Device memory 48 k word point: 10 ms Device memory 100 k word point: 15 ms | |||||||||||||||||||||||||||||||||||||||
| Constant Scan | 0.5 to 2,000 ms (can be set in 0.5 ms intervals) | ||||||||||||||||||||||||||||||||||||||||
| Program Capacity | 124 K steps (496 K bytes) | ||||||||||||||||||||||||||||||||||||||||
| Memory Capacity | Program Memory (Drive 0) | 496 K bytes | |||||||||||||||||||||||||||||||||||||||
| Memory card (RAM) (Drive 1) | Installed memory card capacity (Max 2 M bytes) | ||||||||||||||||||||||||||||||||||||||||
| Memory Card (ROM) (Drive 2) | Installed memory card capacity (Flash card: Max. 4 M bytes, ATA card: Max. 32 M bytes) | ||||||||||||||||||||||||||||||||||||||||
| Standard RAM (Drive 3) | 256 K bytes | ||||||||||||||||||||||||||||||||||||||||
| Standard ROM (Drive 4) | 496 K bytes | ||||||||||||||||||||||||||||||||||||||||
| Maximum File Storage Capacity | Program Memory | 124 pcs. | |||||||||||||||||||||||||||||||||||||||
| Memory Card (RAM) | 287 pcs. (when Q2MEM-2MBS is used) | ||||||||||||||||||||||||||||||||||||||||
| Memory Card (ROM) | Flash Card | 288 pcs. | |||||||||||||||||||||||||||||||||||||||
| ATA Card | 512 pcs. | ||||||||||||||||||||||||||||||||||||||||
| Standard RAM | 3 pcs. | ||||||||||||||||||||||||||||||||||||||||
| Standard ROM | 124 pcs. | ||||||||||||||||||||||||||||||||||||||||
| Maximum Setting Number of Intelligent Function Unit Parameters | Initial Setting | 512 pcs | |||||||||||||||||||||||||||||||||||||||
| Refresh | 256 pcs | ||||||||||||||||||||||||||||||||||||||||
| Number of Input/Output Devices | 8,192 points (X/Y0 to 1FFF) | ||||||||||||||||||||||||||||||||||||||||
| Number of Inputs/Outputs | 4,096 points (X/Y0 to FFF) | ||||||||||||||||||||||||||||||||||||||||
| Number of Devices | Internal Relay [M] | Default 8,192 points (M0 to 8,191) (variable) | |||||||||||||||||||||||||||||||||||||||
| Latch Relay [L] | Default 8,192 points (L0 to 8,191) (variable) | ||||||||||||||||||||||||||||||||||||||||
| Link Relay [B] | Default 8,192 points (B0 to 1FFF) (variable) | ||||||||||||||||||||||||||||||||||||||||
| Timer [T] | Default 2,048 points (T0 to 2,047) (Low-speed timer / High-speed timer shared) (variable) Low-speed timer / High-speed timer is specified by command Measurement unit of Low-speed timer / High-speed timer is set by a parameter (Low-speed timer: 1 to 1,000 ms, 1 ms interval, Default 100 ms) (High-speed timer: 0.1 to 100.0 ms, 0.1 ms interval, Default 10.0 ms) | ||||||||||||||||||||||||||||||||||||||||
| Integration Timer [ST] | Default 0 point (Low-speed integration timer / High-speed integration timer shared) (variable) Low-speed integration timer / High-speed integration timer is specified by command Measurement unit of Low-speed integration timer / High-speed integration timer is set by a parameter (Low-speed integration timer: 1 to 1,000 ms, 1 ms interval, Default 100 ms) (High-speed integration timer: 0.1 to 100.0 ms, 0.1 ms interval, Default 10.0 ms) | ||||||||||||||||||||||||||||||||||||||||
| Counter [C] | Normal Counter: Default 1,024 points (C0 to 1,023) (variable) Interruption Counter: Max. 256 points (Default 0 point, set by parameters) | ||||||||||||||||||||||||||||||||||||||||
| Data Register [D] | Default 12,288 points (D0 to 12,287) (variable) | ||||||||||||||||||||||||||||||||||||||||
| Link Register [W] | Default 8,192 points (W0 to 1FFF) (variable) | ||||||||||||||||||||||||||||||||||||||||
| Annunciator [F] | Default 2,048 points (F0 to 2,047) (variable) | ||||||||||||||||||||||||||||||||||||||||
| Edge Relay [V] | Default 2,048 points (V0 to 2,047) (variable) | ||||||||||||||||||||||||||||||||||||||||
| File Register [R] | Standard RAM | 32,768 points (R0 to 32,767) Up to 131,072 points can be used by block switching | |||||||||||||||||||||||||||||||||||||||
| SRAM Card (1 M bytes) | 32,768 points (R0 to 32,767) Up to 517,120 points can be used by block switching | ||||||||||||||||||||||||||||||||||||||||
| SRAM Card (2 M bytes) | 32,768 points (R0 to 32,767) up to 1,041,408 points can be used by block switching | ||||||||||||||||||||||||||||||||||||||||
| Flash Card (2 M bytes) | 32,768 points (R0 to 32,767) up to 1,041,408 points can be used by block switching | ||||||||||||||||||||||||||||||||||||||||
| Flash Card (4 M bytes) | 32,768 points (R0 to 32,767) Up to 1,042,432 points can be used by block switching | ||||||||||||||||||||||||||||||||||||||||
| File Register [ZR] |
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